/***********************************************************
 *                 Design by tanxiao                       *
 ***********************************************************
 *                                                         *
 *                                                         *
 *                                                         *
 *                                                         *
 ***********************************************************
 ***********************************************************
 *    Project : Hacc UVM testbench                         *
 *    File    : ahb_master_seq_lib.sv                      *
 *    Designer: tan xiao                                   *
 *    Date    : Jul 22    CST          2013                *
 *    Descripton : AHB master sequence libary              *
 ***********************************************************
 ***********************************************************
 *  Revision History :                                     *
    $Log: ahb_if.sv $
    Revision 1.1 2013/07/22             tanxiao 
    initial  import


 ***********************************************************/


`ifndef AHB_MASTER_SEQ_LIB_SV  
`define AHB_MASTER_SEQ_LIB_SV  


class ahb_master_base_seq extends uvm_sequence #(ahb_transfer);

    function new(string name = "ahb_master_base_seq");
       super.new(name);
    endfunction  

    `uvm_object_utils(ahb_master_base_seq)


// Use a base sequence to raise/drop objection if this is a default sequence
  virtual task pre_body();
      if(starting_phase != null)
         starting_phase.raise_objection(this, {"Running AHB sequence '", 
                                               get_full_name(), "'"});
  endtask

  virtual task post_body();
      if(starting_phase != null)
         starting_phase.drop_objection(this, {"Completed AHB sequence '", 
                                               get_full_name(), "'"});
  endtask
endclass : ahb_master_base_seq


//-----------------------------------------------------------------
//
// SEQUENCE : ahb_write_word_seq
//
//-----------------------------------------------------------------

class ahb_write_word_seq extends ahb_master_base_seq ;
     
     rand bit [`AHB_ADDR_WIDTH-1:0]    start_addr    ;
     rand bit [`AHB_DATA_WIDTH-1:0]    write_data    ;

     function new(string name ="ahb_write_word_seq");
       super.new(name);
     endfunction

     `uvm_object_utils(ahb_write_word_seq)

     virtual task body();

       `uvm_do_with(req,
          {  req.address   == start_addr  ;
             req.direction == WRITE       ;
             req.data      == write_data  ;
             req.hsize     == WORD        ;
             req.burst     == SINGLE      ;
          } )

       `uvm_info(get_type_name(), $psprintf("AHB  WRITE: addr = 'h%0h, data = 'h%0h",
              req.address, req.data), UVM_HIGH)
     endtask
endclass : ahb_write_word_seq




//-----------------------------------------------------------------
//
// SEQUENCE : ahb_read_word_seq
//
//-----------------------------------------------------------------

class ahb_read_word_seq extends ahb_master_base_seq ;
     
     rand bit [`AHB_ADDR_WIDTH-1:0]    start_addr    ;

     function new(string name ="ahb_read_word_seq");
       super.new(name);
     endfunction

     `uvm_object_utils(ahb_read_word_seq)

     virtual task body();

       `uvm_do_with(req,
          {  req.address   == start_addr  ;
             req.direction == READ        ;
             req.hsize     == WORD        ;
             req.burst     == SINGLE      ;
          } )

       get_response(rsp);
       
       `uvm_info(get_type_name(), $psprintf("AHB READ: addr = 'h%0h, data = 'h%0h",
              req.address, rsp.data), UVM_HIGH)
     endtask
endclass : ahb_read_word_seq

`endif
